Nanotechnology Engineering

DEMETRIO LOGOTETA

Comprehension of the physical models describing the operation of basic semiconductor devices.
Development of suitable methodological approaches for the analysis of the operation of semiconductor devices.
Understanding of the manufacturing technology of integrated devices, of its evolution, its main limits and its future trends.

Comprehension of the physical models describing the operation of basic semiconductor devices.
Development of suitable methodological approaches for the analysis of the operation of semiconductor devices.
Understanding of the manufacturing technology of integrated devices, of its evolution, its main limits and its future trends.

Fundamentals of electromagnetism and mathematical analysis.

Elements of quantum mechanics.

Basic electronic properties of semiconductors: silicon lattice structure and main lattice defects; bonds in solids; valence and conduction bands; band gap; Fermi-Dirac distribution; concept of hole; density of states; thermodynamic equilibrium and mass-action law; n-doped, p-doped and compensated semiconductors.
Non-homogeneous semiconductors: band bending; kinetic and potential energy of carriers; drift and diffusion currents; quasi-Fermi levels.

Generation-recombination processes; light absorption and photogeneration; trap-assisted recombination; continuity equations.

P-n junction: solution of the Poisson equation at equilibrium within the complete depletion approximation; profiles of the electrostatic potential and of the electric field; effect of an external bias; derivation of the ideal diode current-voltage characteristic; profile of the electron and hole current densities, and of the carrier densities; nonidealities: short-base diodes, breakdown of a reverse-biased junction, generation-recombination current, parasitic series resistances, high injection effects.
Metal-semiconductor contacts: electron affinity and work function; Schottky barrier; fabrication of ohmic contacts on p-type and n-type silicon.

Bipolar junction transistor: structure; derivation of the electron and hole current densities in the different operation regions; performance parameters; base-width modulation and punchthrough.
MOS capacitor: ideal structure; band diagrams and derivation of the charge density as a function of the gate voltage; traps, charged defects and their effect on the flat-band voltage; concept of differential capacitance; capacitance-voltage curve at low and high frequency; Fowler-Nordheim tunnelling.

Field-effect transistor (MOSFET): structure and working principle; derivation of the drain current in a long-channel transistor within the square-law and the bulk-charge models; derivation of the subthreshold current; differences with respect to a short-channel MOSFET.

Concept of scaling: Moore’s law and fabrication yield; constant-field scaling; impact of scaling on static and dynamic power dissipation, mobility, variability and non-recurring costs; technological boosters.

Impact of scaling on MOSFET reliability: concept of hot electrons; gate leakage current; snap-back; latch-up; calculation of the maximum electric field in the transistor channel and technological solutions to reduce it; threshold voltage roll-off, drain-induced barrier lowering and punchthrough; quantum corrections to the mobile charge profile in the transistor channel.

Scaling properties of the gate oxide: trap-assisted tunnelling; breakdown; Weibull statistics to model the occurrence of percolation paths; projection rules.
High-k oxides: equivalent oxide thickness; basic requirements and technological issues; deposition methods; Poole-Frenkel emission.

Back-end contacts and isolation: source, drain and gate contact engineering; lateral isolation techniques.

Back-end interconnections: metal levels; propagation delay; realization of copper interconnects through the damascene process; low-k insulators; reliability issues related to stress-induced diffusion and electromigration.

Evolutions beyond the planar MOSFET: concept of natural length; silicon-on-insulator, double gate, FinFET and nanosheet architectures; steep-slope transistors; tunnel FET.

Robert Pierret, "Semiconductor device fundamentals", Addison Wesley (1996)
Richard Muller and Theodore Kamins, "Device Electronics for Integrated Circuits", Wiley (2002)
Simon Sze and Ming-Kwei Lee, "Semiconductor Devices", John Wiley and Sons (2012)
Fernanda Irrera, "Ultralarge scale integration in CMOS technology", Efesto (2018)

Lectures, exercises and seminars.

Attending the course is not compulsory, bu it is strongly recommended.

Written test and oral examination. The written test consists of exercises and theoretical questions. The oral examination is a discussion about the topics of the course. Students access the oral examination upon passing the written test.

Discuss the "bulk-charge" approach in field-effect transistor modeling and point out its differences with respect to simpler models.
Discuss the reliability issues induced by the scaling down of electronic devices and the technological solutions used to overcome them.