SALVATORE PONTARELLI

NOTICE TO STUDENTS OF THE HIGH PERFORMANCE COMPUTERING COURSE

The lesson on Monday 22 September will not be held to allow students to participate in the initiatives planned in solidarity with the Global Sumud Flottilla.
Classes will start regularly on Thursday 25 September.

HIGH PERFORMANCE COMPUTING
Hours:  Monday from 4.00pm to 7.00pm, room 3, Via del Castro Laurenziano, 7a
Thursday from 5.00pm to 7.00pm, room 3 in Via De Lollis, with access from the laboratories in Via Tiburtina.  

Students in the course can register to the Google Classroom for the course with the code zx5soohr (https://classroom.google.com/c/MjE2NTIzOTYxNDZa?cjc=zx5soohr) using the email provided by the university.

Salvatore Pontarelli started his research activity in the Defect and Fault Tolerance group of the University of Rome “Tor Vergata” working on the design of highly reliable systems for space applications. In this context, he collaborated with various public bodies and private companies (Italian Space Agency, European Space Agency, Thales-Alenia Space, Syderal) in the design of highly reliable digital systems for satellites. Some of these systems are used in several satellites currently in orbit (Gaia satellite and MTG (Meteosat Third Generation) constellation).

In 2009 he began his collaboration with CNIT by studying the use of FPGAs to accelerate algorithms for internet traffic inspection (Deep Packet Inspection) used in Intrusion Detection System. Subsequently, he worked on the design and optimization of structures based on Bloom filters and hash tables, with the aim of improving their efficiency in terms of memory resources and energy consumption. He received three Cisco Research Awards for his research in this field. He has collaborated with various manufacturers of internet network devices (Cisco and Mellanox Technologies). The results of his research activity are used on several Ethernet switching chips. He has participated in several research projects funded by public bodies and private companies, also acting as Principal Investigator and as Work Package manager.

He published more than 60 articles in archival journals and more than 70 contributions in proceedings of international conferences and he holds 11 patents. He has been Guest Editor for several scientific journals (Elvevier and IEEE), is Associate Editor for IEEE Transactions on nanotechnology and IET Electronics Letters and has held organizational roles (Program Chair, General Chair) in various IEEE conferences.