Nanotechnology Engineering

Elements of quantum mechanics. Basic electronic properties of semiconductors: crystal structure of silicon and main crystal defects; bonding model in solids; valence and conduction bands, energy gap; Fermi-Dirac distribution; concept of gap; density of states; thermodynamic equilibrium and mass action law; semiconductor doping: n-type, p-type, and compensated materials. Non-homogeneous semiconductors: band bending, kinetic energy and potential of carriers; drift and diffusion currents; quasi-Fermi levels. Generation and recombination processes: generalities; absorption of light radiation and photogeneration; trap-assisted recombination; continuity equations. P-n junction: solution of Poisson's equation at equilibrium in the complete depletion approximation; profile of the electrostatic potential and electric field; effect of external polarization; derivation of the voltage-current characteristic of an ideal diode; profile of electron and hole current densities and carrier spatial densities; deviations from ideal behavior: short-base diodes, junction breakdown in reverse bias, generation-recombination current, series resistances, high injection effects. Metal-semiconductor contacts: electron affinity and work function; Schottky barrier; realization of ohmic contacts on n-type and p-type silicon. Bipolar junction transistor: structure; derivation of electron and hole current density in different operating regions; performance parameters; base amplitude modulation and punchthrough. MOS capacitor: ideal structure; band diagrams and derivation of charge density as a function of gate voltage; traps, charge defects, and their effect on flat band voltage; concept of differential capacitance; capacitance-voltage curves at low and high frequencies; Fowler-Nordheim tunneling. Field-effect transistor (MOSFET): structure and operating principle; derivation of drain current in a long-channel transistor using the quadratic model and the bulk-charge model; derivation of subthreshold current; differences with a short-channel transistor. Introduction to scaling: Moore's law and manufacturing yield; constant field scaling; effects of scaling on static and dynamic power dissipation, mobility, variability, and non-recurring costs; technology boosters. Effects of scaling on MOSFET reliability: concept of hot electrons; leakage current through the gate oxide; snap-back; latch-up; calculation of the maximum electric field in the channel and technological solutions for its reduction; threshold voltage roll-off, drain-induced barrier lowering, and punchthrough; quantum corrections to the mobile charge profile in the channel. Gate oxide scalability: tunneling assisted by trap states; oxide breakdown; Weibull statistical model for percolation path formation; projection rules. High dielectric constant oxides: equivalent thickness; fundamental requirements and technological issues; deposition methods; Poole-Frenkel emission. Back-end contacts and isolations: engineering of source, drain, and gate contacts; lateral isolation technologies for devices. Back-end interconnections: metallization layers; propagation delays; damascene process for copper interconnections; low dielectric constant insulators; reliability issues related to stress-induced diffusion and electromigration. Planar MOSFET developments: natural length concept; silicon-on-insulator, double-gate, FinFET, and nanosheet architectures; steep-slope transistor concept; tunnel FET. Solid-state memories: floating gate transistors; flash memories; read, write, and erase protocols; endurance and data retention; NAND and NOR architectures; overview of charge trap memories; resistive non-volatile memories.

Fundamentals of electromagnetism and mathematical analysis.

Richard S. Muller and Theodore I. Kamins, Device Electronics for Integrated Circuits, Wiley Ben Streetman and Sanjay Banerjee, Solid State Electronic Devices, Pearson Robert F. Pierret, Semiconductor device fundamentals, Addison Wesley Simon M. Sze and Ming-Kwei Lee, Semiconductor Devices, Wiley Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University Press Fernanda Irrera, Ultra Large Scale Integration in CMOS technology, Edizioni Efesto

Attendance at classes is not compulsory, although it is strongly recommended.

Written test and oral examination. The written test consists of exercises and theoretical questions. The oral examination is a discussion about the topics of the course. Students access the oral examination upon passing the written test.

Ben Streetman and Sanjay Banerjee, Solid State Electronic Devices, Pearson Robert F. Pierret, Semiconductor device fundamentals, Addison Wesley Simon M. Sze and Ming-Kwei Lee, Semiconductor Devices, Wiley Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University Press Fernanda Irrera, Ultra Large Scale Integration in CMOS technology, Edizioni Efesto

Lectures, exercises.

Elements of quantum mechanics. Basic electronic properties of semiconductors: crystal structure of silicon and main crystal defects; bonding model in solids; valence and conduction bands, energy gap; Fermi-Dirac distribution; concept of gap; density of states; thermodynamic equilibrium and mass action law; semiconductor doping: n-type, p-type, and compensated materials. Non-homogeneous semiconductors: band bending, kinetic energy and potential of carriers; drift and diffusion currents; quasi-Fermi levels. Generation and recombination processes: generalities; absorption of light radiation and photogeneration; trap-assisted recombination; continuity equations. P-n junction: solution of Poisson's equation at equilibrium in the complete depletion approximation; profile of the electrostatic potential and electric field; effect of external polarization; derivation of the voltage-current characteristic of an ideal diode; profile of electron and hole current densities and carrier spatial densities; deviations from ideal behavior: short-base diodes, junction breakdown in reverse bias, generation-recombination current, series resistances, high injection effects. Metal-semiconductor contacts: electron affinity and work function; Schottky barrier; realization of ohmic contacts on n-type and p-type silicon. Bipolar junction transistor: structure; derivation of electron and hole current density in different operating regions; performance parameters; base amplitude modulation and punchthrough. MOS capacitor: ideal structure; band diagrams and derivation of charge density as a function of gate voltage; traps, charge defects, and their effect on flat band voltage; concept of differential capacitance; capacitance-voltage curves at low and high frequencies; Fowler-Nordheim tunneling. Field-effect transistor (MOSFET): structure and operating principle; derivation of drain current in a long-channel transistor using the quadratic model and the bulk-charge model; derivation of subthreshold current; differences with a short-channel transistor. Introduction to scaling: Moore's law and manufacturing yield; constant field scaling; effects of scaling on static and dynamic power dissipation, mobility, variability, and non-recurring costs; technology boosters. Effects of scaling on MOSFET reliability: concept of hot electrons; leakage current through the gate oxide; snap-back; latch-up; calculation of the maximum electric field in the channel and technological solutions for its reduction; threshold voltage roll-off, drain-induced barrier lowering, and punchthrough; quantum corrections to the mobile charge profile in the channel. Gate oxide scalability: tunneling assisted by trap states; oxide breakdown; Weibull statistical model for percolation path formation; projection rules. High dielectric constant oxides: equivalent thickness; fundamental requirements and technological issues; deposition methods; Poole-Frenkel emission. Back-end contacts and isolations: engineering of source, drain, and gate contacts; lateral isolation technologies for devices. Back-end interconnections: metallization layers; propagation delays; damascene process for copper interconnections; low dielectric constant insulators; reliability issues related to stress-induced diffusion and electromigration. Planar MOSFET developments: natural length concept; silicon-on-insulator, double-gate, FinFET, and nanosheet architectures; steep-slope transistor concept; tunnel FET. Solid-state memories: floating gate transistors; flash memories; read, write, and erase protocols; endurance and data retention; NAND and NOR architectures; overview of charge trap memories; resistive non-volatile memories.

Fundamentals of electromagnetism and mathematical analysis.

Richard S. Muller and Theodore I. Kamins, Device Electronics for Integrated Circuits, Wiley Ben Streetman and Sanjay Banerjee, Solid State Electronic Devices, Pearson Robert F. Pierret, Semiconductor device fundamentals, Addison Wesley Simon M. Sze and Ming-Kwei Lee, Semiconductor Devices, Wiley Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University Press Fernanda Irrera, Ultra Large Scale Integration in CMOS technology, Edizioni Efesto

Attendance at classes is not compulsory, although it is strongly recommended.

Written test and oral examination. The written test consists of exercises and theoretical questions. The oral examination is a discussion about the topics of the course. Students access the oral examination upon passing the written test.

Ben Streetman and Sanjay Banerjee, Solid State Electronic Devices, Pearson Robert F. Pierret, Semiconductor device fundamentals, Addison Wesley Simon M. Sze and Ming-Kwei Lee, Semiconductor Devices, Wiley Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University Press Fernanda Irrera, Ultra Large Scale Integration in CMOS technology, Edizioni Efesto

Lectures, exercises.